Module Handbook

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Module EIT-EIS-560-M-7

Verification of Digital Systems (M, 5.0 LP)

Module Identification

Module Number Module Name CP (Effort)
EIT-EIS-560-M-7 Verification of Digital Systems 5.0 CP (150 h)

Basedata

CP, Effort 5.0 CP = 150 h
Position of the semester 1 Sem. in WiSe
Level [7] Master (Advanced)
Language [EN] English
Module Manager
Lecturers
Area of study [EIT-EIS] Electronic Design Automatization
Reference course of study [EIT-88.781-SG#2010] M.Sc. Electrical and Computer Engineering [2010]
Livecycle-State [NORM] Active

Courses

Type/SWS Course Number Title Choice in
Module-Part
Presence-Time /
Self-Study
SL SL is
required for exa.
PL CP Sem.
4V EIT-EIS-560-K-7
Verification of Digital Systems
P 56 h 94 h
L-Schein
ja PL1 5.0 WiSe
  • About [EIT-EIS-560-K-7]: Title: "Verification of Digital Systems"; Presence-Time: 56 h; Self-Study: 94 h
  • About [EIT-EIS-560-K-7]: The study achievement "[L-Schein] proof of successful participation in the practical course / lab" must be obtained.
    • It is a prerequisite for the examination for PL1.

Examination achievement PL1

  • Form of examination: oral examination (30 Min.)
  • Examination Frequency: each semester

Evaluation of grades

The grade of the module examination is also the module grade.


Contents

  • Formal hardware verification in System-on-Chip design flow
  • Graph representations of Boolean functions (BDDs, BMDs)
  • CTL Model Checking
  • Symbolic Model Checking
  • Property checking with SAT-based methods (bounded model checking)
  • Formal equivalence checking
  • Industrial trends, scientific challenges
  • Solving proactical verification problems with a commercial tool

Competencies / intended learning achievements

After completing this module you can...
  • ... explain the technology underlying today’s formal verification tools.
  • ... list and explain approaches for practical SoC verification methodologies with formal methods.
  • ... list and summarize important trends in this field and their scientific challenges.
  • ... use commercial property checker on given tasks.

Requirements for attendance of the module (informal)

Modules:

Requirements for attendance of the module (formal)

None

References to Module / Module Number [EIT-EIS-560-M-7]

Course of Study Section Choice/Obligation
[EIT-88.781-SG#2010] M.Sc. Electrical and Computer Engineering [2010] [Compulsory Modules] Theoretical Part [P] Compulsory
[EIT-88.781-SG#2010] M.Sc. Electrical and Computer Engineering [2010] [Compulsory Modules] Specialization Modules [P] Compulsory
[EIT-88.A20-SG#2021] M.Sc. European Master in Embedded Computing Systems (EMECS) [2021] [Core Modules (non specialised)] Core Subjects [WP] Compulsory Elective
[EIT-88.A20-SG#2021] M.Sc. European Master in Embedded Computing Systems (EMECS) [2021] [Free Elective Area] Elective Subjects [W] Elective Module
[EIT-88.D55-SG#2021] M.Sc. Embedded Computing Systems (ESY) [2021] [Core Modules (non specialised)] Core Program [WP] Compulsory Elective
[EIT-88.D55-SG#2021] M.Sc. Embedded Computing Systems (ESY) [2021] [Free Elective Area] Elective Subjects [W] Elective Module
[EIT-88.781-SG#2021] M.Sc. Electrical and Computer Engineering [2021] [Section (non-specific)] Major Embedded Systems (ESY) [P] Compulsory
Module-Pool Name
[EIT-AC-MSC-TW-MPOOL-7] General Elective Modules Master A&C
[EIT-SIAK-DT-CSIT-MPOOL] SIAK Certificate "Digital Transformation" - Modules EIT "Computer Science & IT"