Module Handbook

  • Dynamischer Default-Fachbereich geändert auf EIT

Course EIT-EMS-732-K-7

FPGA-Based Hardware Accelerators and Hybrid Systems (2V+1L, 4.0 LP)

Course Type

SWS Type Course Form CP (Effort) Presence-Time / Self-Study
- K Lecture with exercise classes and lab (V/U/L) 4.0 CP
2 V Lecture with integrated exercises 28 h 48 h
1 L Laboratory course 4 h 40 h
(2V+1L) 4.0 CP 32 h 88 h


CP, Effort 4.0 CP = 120 h
Position of the semester 1 Sem. in SuSe
Level [7] Master (Advanced)
Language [EN] English
Area of study [EIT-EMS] Microelectronic Systems Design
Livecycle-State [NORM] Active


  • Application-level design space exploration and selection of appropriate implementation styles
  • High-level synthesis (HLS)
  • Commercial hybrid devices (Xilinx and Intel FPGAs and SoCs)
  • Virtual platforms (VPs) and SystemC / TLM basics
  • Validation with unit tests and integration tests
  • Development styles: Classic, Test-Driven Design (TDD), and agile hardware design
  • Methods and tools for project tracking and collaboration


see OLAT


see OLAT


Enrollment in the respective OLAT course

Requirements for attendance (informal)

Fundamentals of ...
  • ... computing architectures
  • ... RTL hardware design (VHDL or Verilog)
  • ... microelectronics
  • ... programming skills in C and C++

Requirements for attendance (formal)


References to Course [EIT-EMS-732-K-7]

Module Name Context
[EIT-EMS-732-M-7] FPGA-Based Hardware Accelerators and Hybrid Systems P: Obligatory 2V+1L, 4.0 LP