Module Handbook

  • Dynamischer Default-Fachbereich geändert auf EIT

Course EIT-EMS-654-K-4

Microelectronic Circuit and System Design I (2V+1U, 4.0 LP)

Course Type

SWS Type Course Form CP (Effort) Presence-Time / Self-Study
- K Lecture with exercise classes (V/U) 4.0 CP
2 V Lecture 28 h 48 h
1 U Lecture hall exercise class 14 h 30 h
(2V+1U) 4.0 CP 42 h 78 h


CP, Effort 4.0 CP = 120 h
Position of the semester 1 Sem. in WiSe
Level [4] Bachelor (Specialization)
Language [EN] English
Area of study [EIT-EMS] Microelectronic Systems Design
Livecycle-State [NORM] Active


  • Latest Trends in System-on-Chip Design in advanced technology Nodes
  • MOS Transistor and its electrical Behavior
  • Deep Submicron Effects and new technologies
  • CMOS Manufacturing
  • Reliability Challenges
  • Digital Implementation Styles for ASICs and FPGAs
  • Combinatorial Circuit Techniques
  • Sequential Circuit Techniques


  • J.M. Rabaey : Digital Integrated Circuits - A Design Perspective, Prentice Hall
  • P. Veendrick: Deep-Submicron CMOS ICs: From Basics to ASICs, Kluwer Academic Publisher
  • C. Rowen: Engineering the Complex SoCs, Prentice Hall


see OLAT

Requirements for attendance (informal)


Requirements for attendance (formal)


References to Course [EIT-EMS-654-K-4]

Module Name Context
[EIT-EMS-654-M-4] Microelectronic Circuit and System Design I P: Obligatory 2V+1U, 4.0 LP