Course EIT-EIS-573-K-4
Architecture of Digital Systems II (2V+1U, 4.0 LP)
Course Type
SWS | Type | Course Form | CP (Effort) | Presence-Time / Self-Study | |
---|---|---|---|---|---|
- | K | Lecture with exercise classes (V/U) | 4.0 CP | ||
2 | V | Lecture | 28 h | 48 h | |
1 | U | Lecture hall exercise class | 14 h | 30 h | |
(2V+1U) | 4.0 CP | 42 h | 78 h |
Basedata
SWS | 2V+1U |
---|---|
CP, Effort | 4.0 CP = 120 h |
Position of the semester | 1 Sem. in WiSe |
Level | [4] Bachelor (Specialization) |
Language | [EN] English |
Lecturers | |
Area of study | [EIT-EIS] Electronic Design Automatization |
Livecycle-State | [NORM] Active |
Contents
- Design flow, tools and methodologies for embedded system design
- Microprocessor instruction sets
- Mechanisms and infrastructures for communication within embedded systems. Interrupts, buses, bus hierarchies
- Fundamentals of multi-tasking, inter-process communication
- Multiprocessing fundamentals (computing architectures, cache coherence problem)
- Mechanisms and infrastructures for communication between embedded systems, examples of standard network protocols
Literature
- Wayne Wolf. Computers as Components – Principles of Embedded Computing System Design, Morgan Kaufmann
- Patterson/Hennessy. Computer Organization and Design – The Hardware/Software-Interface, Morgan Kaufmann
- Hennessy/Patterson. Computer Architecture - A Quantitative Approach, Morgan Kaufmann
Materials
Lecture slides
Requirements for attendance (informal)
Modules:
- [EIT-EIS-314-M-2] Fundamentals of Information Processing (M, 6.0 LP)
- [EIT-EMS-324-M-2] Digital Technology Laboratory I (M, 4.0 LP)
Requirements for attendance (formal)
None
References to Course [EIT-EIS-573-K-4]
Module | Name | Context | |
---|---|---|---|
[EIT-EIS-573-M-4] | Architecture of Digital Systems II | P: Obligatory | 2V+1U, 4.0 LP |