Course EIT-EIS-566-K-7
Robust Digital Systems (2V, 3.0 LP)
Course Type
| SWS | Type | Course Form | CP (Effort) | Presence-Time / Self-Study | |
|---|---|---|---|---|---|
| 2 | V | Lecture | 3.0 CP | 28 h | 62 h |
| (2V) | 3.0 CP | 28 h | 62 h | ||
Basedata
| SWS | 2V |
|---|---|
| CP, Effort | 3.0 CP = 90 h |
| Position of the semester | 1 Sem. in SuSe |
| Level | [7] Master (Advanced) |
| Language | [EN] English |
| Lecturers | |
| Area of study | [EIT-EIS] Electronic Design Automatization |
| Livecycle-State | [NORM] Active |
Contents
- Dependability measures for hardware/software systems
- CMOS failure mechanisms
- Fault models
- Manufacturing test
- Design for Testability
- Hardware-based fault tolerance approaches
- Software-based fault tolerance approaches
- Information redundancy (error detecting and correcting codes)
- Design validation
Literature
- I. Koren, C. M. Krishna: Fault-Tolerant Systems Morgan-Kaufmann (2007)
- M.L. Bushnell, V.D. Agrawal: Essentials of Electronic Testing Kluwer (2000)
- L.-T. Wang, C.-W. Wu, X. Wen: VLSI Test Principles and Architectures - Design for Testability, Morgan Kaufmann (2006)
Materials
Presentation slides
Requirements for attendance (informal)
Modules:
- [EIT-EIS-314-M-2] Fundamentals of Information Processing (M, 6.0 LP)
- [EIT-EIS-571-M-4] Architecture of Digital Systems I (M, 4.0 LP)
- [EIT-EIS-573-M-4] Architecture of Digital Systems II (M, 4.0 LP)
- [EIT-EMS-324-M-2] Digital Technology Laboratory I (M, 4.0 LP)
Requirements for attendance (formal)
None
References to Course [EIT-EIS-566-K-7]
| Module | Name | Context | |
|---|---|---|---|
| [EIT-EIS-566-M-7] | Robust Digital Systems | P: Obligatory | 2V, 3.0 LP |