Course EIT-EIS-561-K-7
Embedded Systems Project (2S, 15.0 LP)
Course Type
| SWS | Type | Course Form | CP (Effort) | Presence-Time / Self-Study | |
|---|---|---|---|---|---|
| 2 | S | Project seminar | 15.0 CP | 28 h | 422 h |
| (2S) | 15.0 CP | 28 h | 422 h | ||
Basedata
| SWS | 2S |
|---|---|
| CP, Effort | 15.0 CP = 450 h |
| Position of the semester | 1 Sem. in WiSe/SuSe |
| Level | [7] Master (Advanced) |
| Language | [DE/EN] German or English as required |
| Lecturers | |
| Area of study | [EIT-EIS] Electronic Design Automatization |
| Livecycle-State | [NORM] Active |
Contents
individuell festgelegte Entwurfs- und Verifikationsaufgaben für Eingebettete Systeme: Applikationssoftware, Systemsoftware, Hardware, Toolentwicklung
Literature
wird zu Beginn des Projekts bekannt gegeben
Materials
wird zu Beginn des Projekts bekannt gegeben
Requirements for attendance (informal)
Modules:
- [EIT-EIS-571-M-4] Architecture of Digital Systems I (M, 4.0 LP)
- [EIT-EIS-573-M-4] Architecture of Digital Systems II (M, 4.0 LP)
Requirements for attendance (formal)
None
References to Course [EIT-EIS-561-K-7]
| Module | Name | Context | |
|---|---|---|---|
| [EIT-EIS-561-M-7] | Embedded Systems Project | P: Obligatory | 2S, 15.0 LP |
Notice